Memtest86+ is a free, open-source, standalone memory tester for x86, x86-64, ARM64 and LoongArch64 architecture computers. It provides a much more thorough memory check than BIOS memory tests.
It is also capable of accessing almost all of the computer’s memory without being limited by the memory used by the operating system and not dependent on underlying software such as UEFI libraries.
Memtest86+ can be loaded and run either directly from a PC BIOS (legacy or UEFI) or via an intermediate boot loader that supports Linux 16-bit, 32-bit, 64-bit or EFI handover boot protocol. It should work on any 32-bit or 64-bit Pentium class CPU or higher.
What’s new
ARM64 (AArch64) now supported!
Memtest86+ now runs on ARM64 platforms that support UEFI and ACPI! Aarch64 support is currently tested on Qualcommm Snapdragon X laptops, Raspberry Pi 4 and 5 (with community UEFI firmware), and QEMU.
Save report to USB drive
Writing reports to a USB drive was probably the most requested feature. Press F6 to save a full-text report containing system information, memory modules, and test results to a FAT32 formatted USB drive. Each saved report has its own number so previous reports are not overwritten.
Redesigned testing algorithms
Memtest86+ tests have been redesigned to detect errors faster and optimized to find more complex errors.
SIMD tests on 64-bit CPUs
Along with the new bus stress test (see below), the old random sequence motion test was converted to SIMD to benefit from instructions with larger vectors. Both use non-temporal memory that bypasses the CPU caches and writes directly to main memory, resulting in significantly higher memory access/traffic than scalar tests.
Bus stress test
This new test targets common bus interface vulnerabilities on modern platforms (DDR5+), but still places high demands on older architectures. The sequence constantly alternates between write bursts and read probes while introducing idle periods to create load transients on the module’s PMIC (which cannot be corrected by on-die ECC). This can reveal interface-related errors such as signal integrity errors due to electrical noise or voltage drops or XMP/EXPO training issues. This is exactly what an unstable overclocked DDR5 kit (or high density server motherboards) can show in practice.
Improved bit fade test
In addition to the previous bit fills of 0s and 1s, the final test in a pass includes a new random sequence. Each DRAM cell is now filled with random data, while its neighboring neighbors carry the opposite charge. All CPU cores now load and check the memory cells at the same time.
Rowhammer
Target Row Refresh (tRR) is a feature in modern DIMMs that defeats the classic double-sided hammer. This test uses Blacksmith-style patterns from recent 2022 research with non-uniform, versatile, and synchronized shape with DRAM refresh. It derives the memory line layout from the access time (“DRAMA-lite” approach). Errors are reported but not included in BadRAM patterns.
Serial protocol for automation
The log= boot parameter can be used to produce a line of machine-readable output for each event during testing: startup, system information, test pass and progress, and errors. These lines are easy to parse but still human readable. In addition to the new maxpasses= option (restart after N passes), Memtest86+ can now run headless in test lab environments and CI build systems.
SPD integrity check
Checksum/CRC of the SPD of each memory module (DDR5, DDR4 and older) is now checked and faulty memory modules are reported as BAD CRC! marked. A corrupted SPD could cause some motherboards to hang during POST, but most utilities don’t pay attention to this. Memtest86+ detects it. It can be disabled using the nospdcrc boot parameter.
Memory information from DMI when SPD is not available
On some platforms (e.g. laptops, desktops from major OEMs, ARM boards), reading the SPD data is not possible because the SMBus is locked or inaccessible. Memtest86+ now uses SMBIOS data as a fallback to display information about the memory module (size, type, speed and model number).
Miscellaneous improvements and bug fixes
- Over 100 new DRAM brands discovered
- Support for new platforms (e.g. Intel Wildcat Lake)
- Fixed random hangs in x2APIC SMP mode
- Better CPU temperature reporting on server platforms (e.g. EPYC)
- Various bug fixes (cache detection, USB and keyboard handling, etc.)