Future-oriented: Micron has laid out its memory and storage roadmap for the next few years and unveiled significant upgrades for its next-generation products. The plans include DDR6, LPDDR6, HBM and NAND as the boom in AI infrastructure spending continues to drive up hardware costs.
Micron has described its 1δ (1-Delta) node as a successor to 1γ (1-Gamma). The new node, which features angstrom-level process control and an HKMG CMOS structure, will reportedly deliver approximately 25% higher bit density than its predecessor when manufacturing advanced DRAM products.
Micron added that 1-Delta will support next-generation memory standards such as DDR6 and LPDDR6, with the former offering more than twice the bandwidth of DDR5. However, the company is positioning DDR6 as highly reliable server storage for AI data centers, rather than a direct successor to DDR5 for client PCs.
Micron expects 1-Delta to begin mass production in the second half of 2027, but there is no official launch date for DDR6 yet.
Micron already introduced a 512 GB DDR5 RDIMM with 9,200 MT/s in September 2026. The company is now announcing that its next-generation technology will deliver 1TB RDIMMs for high-density AI workloads, and claims it will be the highest capacity RDIMM in the industry when it enters production.
As for LPDDR6, Micron says it will deliver 35% better power efficiency than LPDDR5, with even greater gains at some densities. Scott DeBoer, the company’s president and chief technology and products officer, said Micron is working with a number of partners, including Meta, to deploy LPDDR6 memory in AI data centers.
Micron also announced that its future memory products will use 6F² (6-feature square) DRAM instead of 4F², citing cost, complexity and capacitor spacing limitations that significantly reduce the latter’s scalability.
The company added that its next-generation DRAM products will utilize wafer bonding and high-NA EUV before potentially moving to newer materials.
In addition to 6F², Micron is reportedly developing 3D DRAM as a longer-term alternative while also introducing “vHBM,” a vertically stacked design that places memory directly on the computing chip. Micron claims the novel design will improve efficiency by increasing bandwidth per watt in its next-generation HBM chips.
In memory, Micron unveiled production plans for its G11 NAND flash with more than 400 layers. Compared to G9, the new product targets twice the bit density, 1.5 times the I/O speed and more than 25% less energy per data transfer. It will also reportedly go into production in the second half of 2027, although Micron has not yet announced an official launch date.
